Sat, 09 Oct 2021 16:45:03 +0200
Update the PCB to include the UART connector and route the USB detect to PC12
(module XTAL_ABLS-8.000MHZ-B2-T (layer F.Cu) (tedit 5F5AB880) (fp_text reference REF** (at -4.62534 -3.33525) (layer F.SilkS) (effects (font (size 1.000079 1.000079) (thickness 0.015))) ) (fp_text value XTAL_ABLS-8.000MHZ-B2-T (at 6.70593 3.26547) (layer F.Fab) (effects (font (size 1.000142 1.000142) (thickness 0.015))) ) (fp_line (start -5.7 2.35) (end -5.7 -2.35) (layer F.Fab) (width 0.127)) (fp_line (start -5.7 -2.35) (end 5.7 -2.35) (layer F.Fab) (width 0.127)) (fp_line (start 5.7 -2.35) (end 5.7 2.35) (layer F.Fab) (width 0.127)) (fp_line (start 5.7 2.35) (end -5.7 2.35) (layer F.Fab) (width 0.127)) (fp_line (start -5.7 -1.42) (end -5.7 -2.35) (layer F.SilkS) (width 0.127)) (fp_line (start -5.7 -2.35) (end 5.7 -2.35) (layer F.SilkS) (width 0.127)) (fp_line (start 5.7 -2.35) (end 5.7 -1.42) (layer F.SilkS) (width 0.127)) (fp_line (start -5.7 1.42) (end -5.7 2.35) (layer F.SilkS) (width 0.127)) (fp_line (start -5.7 2.35) (end 5.7 2.35) (layer F.SilkS) (width 0.127)) (fp_line (start 5.7 2.35) (end 5.7 1.42) (layer F.SilkS) (width 0.127)) (fp_line (start -7.8 2.6) (end -7.8 -2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start -7.8 -2.6) (end 7.8 -2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 7.8 -2.6) (end 7.8 2.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 7.8 2.6) (end -7.8 2.6) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 4.75 0) (size 5.6 2.1) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -4.75 0) (size 5.6 2.1) (layers F.Cu F.Paste F.Mask)) )