diff -r 33cd55d481ba -r 6b6e13653348 content/hp8662a_3.rst
--- a/content/hp8662a_3.rst	Wed Oct 16 21:52:38 2019 +0200
+++ b/content/hp8662a_3.rst	Wed Oct 16 21:53:47 2019 +0200
@@ -11,7 +11,7 @@
 
 This is the part 3 on my series about my HP 8662A Signal Generator, and is
 about the third main problems I found with this unit, as evocated in `part
-2 <{filename}hp8662a_2.rst>`_: Error 04 is lit and there are some very
+2 <{static}hp8662a_2.rst>`_: Error 04 is lit and there are some very
 unpleasant spectrums at some frequencies.
 
 
@@ -24,7 +24,7 @@
 procedure to follow in on the Service Sheet H. The general block diagram of
 this section is as follow:
 
-.. image:: {filename}images/hp8662a/LF_block_diagram.png
+.. image:: {static}images/hp8662a/LF_block_diagram.png
    :class: image-process-large-photo
 
 This Low Frequency Section consists in no less than 4 phase locked loops in
@@ -53,7 +53,7 @@
 
 Here is a more detailed vue of the block diagram of the low frequency section:
 
-.. image:: {filename}images/hp8662a/sheet_H.png
+.. image:: {static}images/hp8662a/sheet_H.png
    :class: image-process-large-photo
 
 
@@ -107,7 +107,7 @@
 their ideal values (the error is inversed to make the plot easier to read; most
 of the time, I am below the expected value):
 
-.. plotly:: {filename}/json/hp8662a_vco_sl.json
+.. plotly:: {static}/json/hp8662a_vco_sl.json
    :width: 800
    :height: 600
 
@@ -130,26 +130,26 @@
 
 For example, at 100.3MHz, we have a decent signal:
 
-.. image:: {filename}/images/hp8662a/working_not_quite_3.jpg
+.. image:: {static}/images/hp8662a/working_not_quite_3.jpg
    :class: image-process-large-photo
 
-.. image:: {filename}/images/hp8662a/working_not_quite_3_sa.jpg
+.. image:: {static}/images/hp8662a/working_not_quite_3_sa.jpg
    :class: image-process-large-photo
 
 but at 101.0Mhz, it begins to looks pretty messy:
 
-.. image:: {filename}/images/hp8662a/working_not_quite_2.jpg
+.. image:: {static}/images/hp8662a/working_not_quite_2.jpg
    :class: image-process-large-photo
 
-.. image:: {filename}/images/hp8662a/working_not_quite_2_sa.jpg
+.. image:: {static}/images/hp8662a/working_not_quite_2_sa.jpg
    :class: image-process-large-photo
 
 and 101.9Mhz shows "nice" side bands:
 
-.. image:: {filename}/images/hp8662a/working_not_quite.jpg
+.. image:: {static}/images/hp8662a/working_not_quite.jpg
    :class: image-process-large-photo
 
-.. image:: {filename}/images/hp8662a/working_not_quite_sa.jpg
+.. image:: {static}/images/hp8662a/working_not_quite_sa.jpg
    :class: image-process-large-photo
 
 The problem seems quite clear: some PLL cannot lock at specific frequencies,
@@ -176,5 +176,5 @@
 
 For example, a 101MHz signal which was very unstable before now looks like:
 
-.. image:: {filename}/images/hp8662a/working_101.jpg
+.. image:: {static}/images/hp8662a/working_101.jpg
    :class: image-process-large-photo