content/hp3562a_2.rst

Tue, 28 Aug 2018 15:05:01 +0200

author
David Douard <david.douard@logilab.fr>
date
Tue, 28 Aug 2018 15:05:01 +0200
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1 ==========================================
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2 HP3562A Dynamic Signal Analyzer - Part 2
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3 ==========================================
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4
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5 :Author: David Douard
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6 :Category: Electronics
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7 :Tags: HP3562A, repair, test equipment, DSA
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8 :series: HP 3562A
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9 :series_index: 2
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10
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11 This is the part 2 of the series about my
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12 `HP 3562A Digital Signal Analyzer <{filename}hp3562a.rst>`_,
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13 quickly describing the Digital Section of the instrument.
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14
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15
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16 Digital Section
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17 ===============
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18
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19 The unit is quite capable, since the main CPU is a 68000 (not exactly
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20 of small CPU for the time).
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21
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22 .. image:: {filename}images/hp3562a/cpu.jpg
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23
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24 The 8 boards are:
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25
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26 - A1: Digital source and front-end interface (rev B, ref: 03562-66501)
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27 - A2: CPU & GPIB controller (rev D, ref: 03562-66502)
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28 - A3: Memory (rev B, ref: 03562-66538)
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29 - A4: Local oscillator (rev C, ref: 03562-66504)
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30 - A5: Digital filter (rev B, ref: 03562-66505)
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31 - A6: Digital filter controller (rev D, ref: 03562-66506)
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32 - A7: Floating Point Processor (FPP) (rev B, ref: 03562-66507)
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33 - A9: FFT (rev B, ref: 03562-66509)
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34
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35 The service manual also describes an A8 board with additional RAM, but
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36 my device does not have such a board. It looks to me that my version
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37 of the DSA has both extra ROM and RAM on the A3 memory board.
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38
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39
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40 Digital Source
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41 --------------
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42
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43 .. Note:: The Service Manual available on the net lacks a few pages in
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44 the Digital Source section, so I do not have details on the
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45 Timing Control section.
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46
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47 .. image:: {filename}images/hp3562a/hp3562a_a1_block_diagram.png
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48 :alt: Block diagram of the A1 Digital Source Board
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49
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50 This board is mainly responsible for generating the digital signals
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51 that are used as input for the source DAC. It generates all sort of
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52 noise figures, bursts, sweeps, and so on.
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53
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54 .. image:: {filename}images/hp3562a/a1_digital_source.jpg
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55
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56 The Timing Control section looks like:
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57
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58 .. image:: {filename}images/hp3562a/hp3562a_a1_timing_control_circuit.png
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59 :alt: A1 Timing Control block diagram
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60
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61 The Phase Resolution is used in external and internal triggered
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62 measurements, ensuring that the phase of a triggered measurement is
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63 accurate. Since the trigger moment does not always occur on a sample
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64 and hold edge, there is a time delay and phase error in the data.
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65 This phase resolution circuit counts the time between the samples and
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66 a trigger.
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67
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68 .. image:: {filename}images/hp3562a/hp3562a_a1_phase_resolution_circuit.png
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69 :alt: A1 Phase Resolution block diagram
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70
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71 The Burst Control circuit controls the burst length and generates the
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72 pulse signal to the Local Oscillator (A4). It provides the gating
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73 signal that gates the analog source on and off during the burst and
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74 chirp modes.
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75
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76 .. image:: {filename}images/hp3562a/hp3562a_a1_burst_control_circuit.png
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77 :alt: A1 Burst Control block diagram
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78
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79
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80 Other parts of this board are the LO Input Receiver that synchronizes
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81 the local oscillator input data to the sample rate, the Multiplier
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82 that multiply the LO data by the noise and send it to the analog
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83 source, and the Noise Generator that produces binary random sequences
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84 that is used for band-limited random noise and burst noise signals.
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85
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86
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87 CPU
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88 ---
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89
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90 The processing unit is a MC68000. It aims at telling each assembly
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91 which process to execute and monitor the overall functionning and data
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92 processing of the instrument.
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93
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94 .. image:: {filename}images/hp3562a/hp3562a_a2_block_diagram.png
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95
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96 The main CPU board, with the beautiful MC68000P9 DIP64 package:
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97
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98 .. image:: {filename}images/hp3562a/a2_cpu.jpg
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99
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100 It comes with 2 populated M5M256BP static ram chips (32k x 8bits), for
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101 the CPU, but seems to be capable of holding 4 more of them. The CPU
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102 runs at 8MHz.
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103
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104 There is also some ROM, the main "boot loader" program. Unfortunately,
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105 neither of the ROM chips are mounted on sockets but are directly
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106 soldered on the PCBs, so I did not took the risk of damaging one of
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107 them by desoldering them for dumping their content.
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108
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109 Most of the remaining of the circuit is to manage the global data bus,
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110 the system bus, the IRQs and the GPIB bus.
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111
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112 The blue connector is for the GPIB connector.
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113
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114
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115 Memory
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116 ------
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117
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118 .. image:: {filename}images/hp3562a/a38_memory.jpg
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119
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120 This board is described as an "extension of the read only memory of
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121 the system CPU board" and read/write memory used by most of the other
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122 assemblies.
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123
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124 .. image:: {filename}images/hp3562a/hp3562a_a38_memory_block_diagram.png
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125
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126 The ROM section stores most programs for the HP 3562A except the
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127 startup routines (which are on the ROM ships of the A2 CPU
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128 bloard).
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129
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130 The board allows flexibility in the number and type of ROM chipes
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131 used. ROM density is selected by placement of jumpers.
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132
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133 .. image:: {filename}images/hp3562a/hp3562a_a38_rom_block_diagram.png
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134
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135
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136 The RAM section of the assembly consist of 4 32k by 8 bits static RAM
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137 chips as well as the arbitrer section which controls access requests
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138 to the global RAM from six devices (FFT, both Digital Filters,
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139 Display, FPP and the system CPU).
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140
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141 .. image:: {filename}images/hp3562a/hp3562a_a38_ram_block_diagram.png
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142
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143 The Display Controller section also lies on this A38 board.
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144
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145 .. Note:: On older versions of the instruments, this board was
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146 splitted in 2 (A3 and A8) and used less dense chips (thus, much more
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147 chips).
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148
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149
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150 Local Oscillator
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151 ----------------
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152
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153 The Local Oscillator produces digital sin and cosine signals
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154 (synchronized with the sample rate). The sinusoidal signal is
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155 generated from a table of values stored in the ROM.
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156
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157 .. image:: {filename}images/hp3562a/hp3562a_a4_block_diagram.png
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158
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159 .. image:: {filename}images/hp3562a/a4_loc.jpg
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160
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161
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162
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163 Digital Filter and Digital Filter Controller
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164 --------------------------------------------
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165
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166 The Digital Filter Assembly consists in both A5 and A6. It processes
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167 two channels of serial data coming from the instrument front end (ADC)
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168 ans stores the results in global RAM. Processing consists of
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169 conversion from a serial format to a parallel format and, if required,
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170 digital filtering or zoom (a combination of frequency shifting and
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171 filtering). The processed data is transferred on the global data bus.
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172
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173 .. figure:: {filename}images/hp3562a/a5_a6_block_diagram.png
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174 :alt: Digital Filter Assembly block diagram
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175
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176 Digital Filter Assembly block diagram.
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177
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178 **Digital Filter:** Each digital filter consists of a control IC and 2
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179 filter ICs, one for the real data and one for the imaginary data.
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180
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181 .. figure:: {filename}images/hp3562a/a6_zoom.png
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182 :alt: Digital Filter for the zoom mode
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183
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184 The Digital Filters are fed with a kind of LF I/Q demodulator, used
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185 for zooming or actual digital filtering.
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186
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187
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188 .. figure:: {filename}images/hp3562a/a5_filter.jpg
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189 :alt: Picture of the A5 Digital Filter board
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190
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191 Picture of the A5 Digital Filter board.
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192
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193 .. figure:: {filename}images/hp3562a/hp3562a_a5_block_diagram.png
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194 :alt: Digital Filter block diagram
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195
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196 The A5 Digital Filter board block diagram.
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197
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198
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199 **Clock Generator:** The clock generator creates two complementary clock
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200 pulses from the 10.24MHz system clock.
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201
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202 **Overload Detect:** The first 3 bits in the ADC serial data stream
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203 contain overrange information that must be stripped off the serial
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204 data.
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205
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206
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207 .. figure:: {filename}images/hp3562a/a6_control.jpg
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208 :alt: Picture of the A6 Digital Filter Control board
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209
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210 Picture of the A6 Digital Filter Control board.
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211
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212 .. figure:: {filename}images/hp3562a/a6_block_diagram.png
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213 :alt: Digital Filter Controller block diagram
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214
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215 The A6 Digital Filter Controller board block diagram.
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216
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217
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218 FPP
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219 ---
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220
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221 The Floating Point Processor board is a fast arithmetic unit which
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222 carries out real and complex arithmetic operations on blocks of data
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223 stored in the global RAM. The processing ALUs are six AM2903 bit-slice
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224 microprocessor ICs and one AM2910 microprogram
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225 controller. Instructions are provided to the ALUs by an address
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226 sequencer and seven microcode PROMs.
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227
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228 .. figure:: {filename}images/hp3562a/hp3562a_a7_block_diagram.png
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229 :alt: Floating Point Processor block diagram
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230 :align: center
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231
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232 Floating Point Processor block diagram.
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233
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234 .. figure:: {filename}images/hp3562a/a7_fpp.jpg
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235 :alt: Picture of the A7 FPP board
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236 :align: center
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237
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238 Picture of the A7 FPP board.
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239
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240 This Floating Point Processor is capable of handling 16 bits integers,
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241 32 bits and 64 bits floats.
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242
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243
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244 FFT
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245 ---
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246
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247 .. image:: {filename}images/hp3562a/hp3562a_a9_block_diagram.png
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248
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249 The FFT board performs windowing, FFT and Inverse FFT directly from
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250 and to the RAM.
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251 It's built around a TMS230 microprocessor runningat 5MHz
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252
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253 .. image:: {filename}images/hp3562a/a9_fft.jpg
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254
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255
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256 Keyboard
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257 --------
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258
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259 .. image:: {filename}images/hp3562a/hp3562a_a15_block_diagram.png
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260
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261
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262 Next
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263 ====
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264
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265 In the `next part <{filename}hp3562a_3.rst>`_, we will describe the
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266 Analog Section of the instrument.

mercurial