src/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/startup_stm32f303xe.S

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1 /**
2 ******************************************************************************
3 * @file startup_stm32f303xe.s
4 * @author MCD Application Team
5 * @brief STM32F303xE devices vector table for GCC toolchain.
6 * This module performs:
7 * - Set the initial SP
8 * - Set the initial PC == Reset_Handler,
9 * - Set the vector table entries with the exceptions ISR address,
10 * - Configure the clock system
11 * - Branches to main in the C library (which eventually
12 * calls main()).
13 * After Reset the Cortex-M4 processor is in Thread mode,
14 * priority is Privileged, and the Stack is set to Main.
15 ******************************************************************************
16 *
17 * Redistribution and use in source and binary forms, with or without modification,
18 * are permitted provided that the following conditions are met:
19 * 1. Redistributions of source code must retain the above copyright notice,
20 * this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright notice,
22 * this list of conditions and the following disclaimer in the documentation
23 * and/or other materials provided with the distribution.
24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 *
39 ******************************************************************************
40 */
41
42 .syntax unified
43 .cpu cortex-m4
44 .fpu softvfp
45 .thumb
46
47 .global g_pfnVectors
48 .global Default_Handler
49
50 /* start address for the initialization values of the .data section.
51 defined in linker script */
52 .word _sidata
53 /* start address for the .data section. defined in linker script */
54 .word _sdata
55 /* end address for the .data section. defined in linker script */
56 .word _edata
57 /* start address for the .bss section. defined in linker script */
58 .word _sbss
59 /* end address for the .bss section. defined in linker script */
60 .word _ebss
61
62 .equ BootRAM, 0xF1E0F85F
63 /**
64 * @brief This is the code that gets called when the processor first
65 * starts execution following a reset event. Only the absolutely
66 * necessary set is performed, after which the application
67 * supplied main() routine is called.
68 * @param None
69 * @retval : None
70 */
71
72 .section .text.Reset_Handler
73 .weak Reset_Handler
74 .type Reset_Handler, %function
75 Reset_Handler:
76 ldr sp, =_estack /* Atollic update: set stack pointer */
77
78 /* Copy the data segment initializers from flash to SRAM */
79 movs r1, #0
80 b LoopCopyDataInit
81
82 CopyDataInit:
83 ldr r3, =_sidata
84 ldr r3, [r3, r1]
85 str r3, [r0, r1]
86 adds r1, r1, #4
87
88 LoopCopyDataInit:
89 ldr r0, =_sdata
90 ldr r3, =_edata
91 adds r2, r0, r1
92 cmp r2, r3
93 bcc CopyDataInit
94 ldr r2, =_sbss
95 b LoopFillZerobss
96 /* Zero fill the bss segment. */
97 FillZerobss:
98 movs r3, #0
99 str r3, [r2], #4
100
101 LoopFillZerobss:
102 ldr r3, = _ebss
103 cmp r2, r3
104 bcc FillZerobss
105
106 /* Call the clock system intitialization function.*/
107 bl SystemInit
108 /* Call static constructors */
109 //bl __libc_init_array
110 /* Call the application's entry point.*/
111 //bl main
112 /**
113 * Calling the crt0 'cold-start' entry point. There __libc_init_array is called
114 * and when existing hardware_init_hook() and software_init_hook() before
115 * starting main(). software_init_hook() is available and has to be called due
116 * to initializsation when using rtos.
117 */
118 bl _start
119
120 LoopForever:
121 b LoopForever
122
123 .size Reset_Handler, .-Reset_Handler
124
125 /**
126 * @brief This is the code that gets called when the processor receives an
127 * unexpected interrupt. This simply enters an infinite loop, preserving
128 * the system state for examination by a debugger.
129 *
130 * @param None
131 * @retval : None
132 */
133 .section .text.Default_Handler,"ax",%progbits
134 Default_Handler:
135 Infinite_Loop:
136 b Infinite_Loop
137 .size Default_Handler, .-Default_Handler
138 /******************************************************************************
139 *
140 * The minimal vector table for a Cortex-M4. Note that the proper constructs
141 * must be placed on this to ensure that it ends up at physical address
142 * 0x0000.0000.
143 *
144 ******************************************************************************/
145 .section .isr_vector,"a",%progbits
146 .type g_pfnVectors, %object
147 .size g_pfnVectors, .-g_pfnVectors
148
149
150 g_pfnVectors:
151 .word _estack
152 .word Reset_Handler
153 .word NMI_Handler
154 .word HardFault_Handler
155 .word MemManage_Handler
156 .word BusFault_Handler
157 .word UsageFault_Handler
158 .word 0
159 .word 0
160 .word 0
161 .word 0
162 .word SVC_Handler
163 .word DebugMon_Handler
164 .word 0
165 .word PendSV_Handler
166 .word SysTick_Handler
167 .word WWDG_IRQHandler
168 .word PVD_IRQHandler
169 .word TAMP_STAMP_IRQHandler
170 .word RTC_WKUP_IRQHandler
171 .word FLASH_IRQHandler
172 .word RCC_IRQHandler
173 .word EXTI0_IRQHandler
174 .word EXTI1_IRQHandler
175 .word EXTI2_TSC_IRQHandler
176 .word EXTI3_IRQHandler
177 .word EXTI4_IRQHandler
178 .word DMA1_Channel1_IRQHandler
179 .word DMA1_Channel2_IRQHandler
180 .word DMA1_Channel3_IRQHandler
181 .word DMA1_Channel4_IRQHandler
182 .word DMA1_Channel5_IRQHandler
183 .word DMA1_Channel6_IRQHandler
184 .word DMA1_Channel7_IRQHandler
185 .word ADC1_2_IRQHandler
186 .word USB_HP_CAN_TX_IRQHandler
187 .word USB_LP_CAN_RX0_IRQHandler
188 .word CAN_RX1_IRQHandler
189 .word CAN_SCE_IRQHandler
190 .word EXTI9_5_IRQHandler
191 .word TIM1_BRK_TIM15_IRQHandler
192 .word TIM1_UP_TIM16_IRQHandler
193 .word TIM1_TRG_COM_TIM17_IRQHandler
194 .word TIM1_CC_IRQHandler
195 .word TIM2_IRQHandler
196 .word TIM3_IRQHandler
197 .word TIM4_IRQHandler
198 .word I2C1_EV_IRQHandler
199 .word I2C1_ER_IRQHandler
200 .word I2C2_EV_IRQHandler
201 .word I2C2_ER_IRQHandler
202 .word SPI1_IRQHandler
203 .word SPI2_IRQHandler
204 .word USART1_IRQHandler
205 .word USART2_IRQHandler
206 .word USART3_IRQHandler
207 .word EXTI15_10_IRQHandler
208 .word RTC_Alarm_IRQHandler
209 .word USBWakeUp_IRQHandler
210 .word TIM8_BRK_IRQHandler
211 .word TIM8_UP_IRQHandler
212 .word TIM8_TRG_COM_IRQHandler
213 .word TIM8_CC_IRQHandler
214 .word ADC3_IRQHandler
215 .word FMC_IRQHandler
216 .word 0
217 .word 0
218 .word SPI3_IRQHandler
219 .word UART4_IRQHandler
220 .word UART5_IRQHandler
221 .word TIM6_DAC_IRQHandler
222 .word TIM7_IRQHandler
223 .word DMA2_Channel1_IRQHandler
224 .word DMA2_Channel2_IRQHandler
225 .word DMA2_Channel3_IRQHandler
226 .word DMA2_Channel4_IRQHandler
227 .word DMA2_Channel5_IRQHandler
228 .word ADC4_IRQHandler
229 .word 0
230 .word 0
231 .word COMP1_2_3_IRQHandler
232 .word COMP4_5_6_IRQHandler
233 .word COMP7_IRQHandler
234 .word 0
235 .word 0
236 .word 0
237 .word 0
238 .word 0
239 .word I2C3_EV_IRQHandler
240 .word I2C3_ER_IRQHandler
241 .word USB_HP_IRQHandler
242 .word USB_LP_IRQHandler
243 .word USBWakeUp_RMP_IRQHandler
244 .word TIM20_BRK_IRQHandler
245 .word TIM20_UP_IRQHandler
246 .word TIM20_TRG_COM_IRQHandler
247 .word TIM20_CC_IRQHandler
248 .word FPU_IRQHandler
249 .word 0
250 .word 0
251 .word SPI4_IRQHandler
252
253 /*******************************************************************************
254 *
255 * Provide weak aliases for each Exception handler to the Default_Handler.
256 * As they are weak aliases, any function with the same name will override
257 * this definition.
258 *
259 *******************************************************************************/
260
261 .weak NMI_Handler
262 .thumb_set NMI_Handler,Default_Handler
263
264 .weak HardFault_Handler
265 .thumb_set HardFault_Handler,Default_Handler
266
267 .weak MemManage_Handler
268 .thumb_set MemManage_Handler,Default_Handler
269
270 .weak BusFault_Handler
271 .thumb_set BusFault_Handler,Default_Handler
272
273 .weak UsageFault_Handler
274 .thumb_set UsageFault_Handler,Default_Handler
275
276 .weak SVC_Handler
277 .thumb_set SVC_Handler,Default_Handler
278
279 .weak DebugMon_Handler
280 .thumb_set DebugMon_Handler,Default_Handler
281
282 .weak PendSV_Handler
283 .thumb_set PendSV_Handler,Default_Handler
284
285 .weak SysTick_Handler
286 .thumb_set SysTick_Handler,Default_Handler
287
288 .weak WWDG_IRQHandler
289 .thumb_set WWDG_IRQHandler,Default_Handler
290
291 .weak PVD_IRQHandler
292 .thumb_set PVD_IRQHandler,Default_Handler
293
294 .weak TAMP_STAMP_IRQHandler
295 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
296
297 .weak RTC_WKUP_IRQHandler
298 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
299
300 .weak FLASH_IRQHandler
301 .thumb_set FLASH_IRQHandler,Default_Handler
302
303 .weak RCC_IRQHandler
304 .thumb_set RCC_IRQHandler,Default_Handler
305
306 .weak EXTI0_IRQHandler
307 .thumb_set EXTI0_IRQHandler,Default_Handler
308
309 .weak EXTI1_IRQHandler
310 .thumb_set EXTI1_IRQHandler,Default_Handler
311
312 .weak EXTI2_TSC_IRQHandler
313 .thumb_set EXTI2_TSC_IRQHandler,Default_Handler
314
315 .weak EXTI3_IRQHandler
316 .thumb_set EXTI3_IRQHandler,Default_Handler
317
318 .weak EXTI4_IRQHandler
319 .thumb_set EXTI4_IRQHandler,Default_Handler
320
321 .weak DMA1_Channel1_IRQHandler
322 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
323
324 .weak DMA1_Channel2_IRQHandler
325 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
326
327 .weak DMA1_Channel3_IRQHandler
328 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
329
330 .weak DMA1_Channel4_IRQHandler
331 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
332
333 .weak DMA1_Channel5_IRQHandler
334 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
335
336 .weak DMA1_Channel6_IRQHandler
337 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
338
339 .weak DMA1_Channel7_IRQHandler
340 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
341
342 .weak ADC1_2_IRQHandler
343 .thumb_set ADC1_2_IRQHandler,Default_Handler
344
345 .weak USB_HP_CAN_TX_IRQHandler
346 .thumb_set USB_HP_CAN_TX_IRQHandler,Default_Handler
347
348 .weak USB_LP_CAN_RX0_IRQHandler
349 .thumb_set USB_LP_CAN_RX0_IRQHandler,Default_Handler
350
351 .weak CAN_RX1_IRQHandler
352 .thumb_set CAN_RX1_IRQHandler,Default_Handler
353
354 .weak CAN_SCE_IRQHandler
355 .thumb_set CAN_SCE_IRQHandler,Default_Handler
356
357 .weak EXTI9_5_IRQHandler
358 .thumb_set EXTI9_5_IRQHandler,Default_Handler
359
360 .weak TIM1_BRK_TIM15_IRQHandler
361 .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
362
363 .weak TIM1_UP_TIM16_IRQHandler
364 .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
365
366 .weak TIM1_TRG_COM_TIM17_IRQHandler
367 .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
368
369 .weak TIM1_CC_IRQHandler
370 .thumb_set TIM1_CC_IRQHandler,Default_Handler
371
372 .weak TIM2_IRQHandler
373 .thumb_set TIM2_IRQHandler,Default_Handler
374
375 .weak TIM3_IRQHandler
376 .thumb_set TIM3_IRQHandler,Default_Handler
377
378 .weak TIM4_IRQHandler
379 .thumb_set TIM4_IRQHandler,Default_Handler
380
381 .weak I2C1_EV_IRQHandler
382 .thumb_set I2C1_EV_IRQHandler,Default_Handler
383
384 .weak I2C1_ER_IRQHandler
385 .thumb_set I2C1_ER_IRQHandler,Default_Handler
386
387 .weak I2C2_EV_IRQHandler
388 .thumb_set I2C2_EV_IRQHandler,Default_Handler
389
390 .weak I2C2_ER_IRQHandler
391 .thumb_set I2C2_ER_IRQHandler,Default_Handler
392
393 .weak SPI1_IRQHandler
394 .thumb_set SPI1_IRQHandler,Default_Handler
395
396 .weak SPI2_IRQHandler
397 .thumb_set SPI2_IRQHandler,Default_Handler
398
399 .weak USART1_IRQHandler
400 .thumb_set USART1_IRQHandler,Default_Handler
401
402 .weak USART2_IRQHandler
403 .thumb_set USART2_IRQHandler,Default_Handler
404
405 .weak USART3_IRQHandler
406 .thumb_set USART3_IRQHandler,Default_Handler
407
408 .weak EXTI15_10_IRQHandler
409 .thumb_set EXTI15_10_IRQHandler,Default_Handler
410
411 .weak RTC_Alarm_IRQHandler
412 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
413
414 .weak USBWakeUp_IRQHandler
415 .thumb_set USBWakeUp_IRQHandler,Default_Handler
416
417 .weak TIM8_BRK_IRQHandler
418 .thumb_set TIM8_BRK_IRQHandler,Default_Handler
419
420 .weak TIM8_UP_IRQHandler
421 .thumb_set TIM8_UP_IRQHandler,Default_Handler
422
423 .weak TIM8_TRG_COM_IRQHandler
424 .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
425
426 .weak TIM8_CC_IRQHandler
427 .thumb_set TIM8_CC_IRQHandler,Default_Handler
428
429 .weak ADC3_IRQHandler
430 .thumb_set ADC3_IRQHandler,Default_Handler
431
432 .weak FMC_IRQHandler
433 .thumb_set FMC_IRQHandler,Default_Handler
434
435 .weak SPI3_IRQHandler
436 .thumb_set SPI3_IRQHandler,Default_Handler
437
438 .weak UART4_IRQHandler
439 .thumb_set UART4_IRQHandler,Default_Handler
440
441 .weak UART5_IRQHandler
442 .thumb_set UART5_IRQHandler,Default_Handler
443
444 .weak TIM6_DAC_IRQHandler
445 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
446
447 .weak TIM7_IRQHandler
448 .thumb_set TIM7_IRQHandler,Default_Handler
449
450 .weak DMA2_Channel1_IRQHandler
451 .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
452
453 .weak DMA2_Channel2_IRQHandler
454 .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
455
456 .weak DMA2_Channel3_IRQHandler
457 .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
458
459 .weak DMA2_Channel4_IRQHandler
460 .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
461
462 .weak DMA2_Channel5_IRQHandler
463 .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
464
465 .weak ADC4_IRQHandler
466 .thumb_set ADC4_IRQHandler,Default_Handler
467
468 .weak COMP1_2_3_IRQHandler
469 .thumb_set COMP1_2_3_IRQHandler,Default_Handler
470
471 .weak COMP4_5_6_IRQHandler
472 .thumb_set COMP4_5_6_IRQHandler,Default_Handler
473
474 .weak COMP7_IRQHandler
475 .thumb_set COMP7_IRQHandler,Default_Handler
476
477 .weak I2C3_EV_IRQHandler
478 .thumb_set I2C3_EV_IRQHandler,Default_Handler
479
480 .weak I2C3_ER_IRQHandler
481 .thumb_set I2C3_ER_IRQHandler,Default_Handler
482
483 .weak USB_HP_IRQHandler
484 .thumb_set USB_HP_IRQHandler,Default_Handler
485
486 .weak USB_LP_IRQHandler
487 .thumb_set USB_LP_IRQHandler,Default_Handler
488
489 .weak USBWakeUp_RMP_IRQHandler
490 .thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler
491
492 .weak TIM20_BRK_IRQHandler
493 .thumb_set TIM20_BRK_IRQHandler,Default_Handler
494
495 .weak TIM20_UP_IRQHandler
496 .thumb_set TIM20_UP_IRQHandler,Default_Handler
497
498 .weak TIM20_TRG_COM_IRQHandler
499 .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
500
501 .weak TIM20_CC_IRQHandler
502 .thumb_set TIM20_CC_IRQHandler,Default_Handler
503
504 .weak FPU_IRQHandler
505 .thumb_set FPU_IRQHandler,Default_Handler
506
507 .weak SPI4_IRQHandler
508 .thumb_set SPI4_IRQHandler,Default_Handler
509 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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